1. Field
Exemplary embodiments of the present invention relate to a semiconductor design technology and, more particularly, to a semiconductor memory device for storing various pieces of state information.
2. Description of the Related Art
In general, a semiconductor memory device such as Double Data Rate Synchronous Dynamic Random Access Memory (DDR SDRAM) includes a circuit for storing its state information. The state information means a characteristic value of a semiconductor memory device. A plurality of semiconductor memory devices have to know their own characteristic values in order to operate according to the same standard. The state information may be obtained from a test operation, etc., and a fuse may be used as a circuit for storing the state information.
Hereinafter, a series of operations for storing state information in a fuse is referred to as a program operation. A method for programming state information in a fuse is largely divided into a physical scheme and an electrical scheme.
The physical scheme is to cut a fuse by using a laser beam and blowing the fuse with the laser beam based on state information to be programmed. The fuse used in the physical scheme is referred to as a physical-type fuse. Since the laser beam is used to cut the connection state of the fuse, the fuse is also referred to as a laser blowing-type fuse. The physical-type fuse may be programmed only in a wafer stage before the semiconductor memory device is packaged.
The electrical scheme changes the connection state of a fuse by applying an overcurrent to the fuse based on state information to be programmed. The fuse used in the electrical scheme is referred to as an electrical-type fuse. The electrical-type fuse may be divided into anti-type fuses and blowing-type fuses. When being programmed, the anti-type fuse changes from an open state to a short state and the blowing-type fuse changes from a short state to an open state. In the case of the electrical-type fuse a program operation may be performed even in a package stage, unlike the physical-type fuse. Thus, the electrical-type fuse is considered an essential component in designing a semiconductor memory device.
Since a semiconductor memory device is required to perform diverse operations, the semiconductor memory device is designed to perform many functions. The increase in the number of functions of the semiconductor memory device indicates an increase in the number of fuses for storing the state information for the respective functions. A fuse array circuit has been introduced to manage a large number of fuses more efficiently.
FIG. 1 is a block diagram illustrating a portion of structures of a typical semiconductor memory device. For the simple description, it is described as an example that the semiconductor memory device includes a fuse array circuit that adopts the electrical scheme (See 130 in FIG. 1).
Referring to FIG. 1, the semiconductor memory device includes a command decoding block 110, a control signal generation block 120, a fuse array block 130, and a fuse information loading block 140.
The command decoding block 110 decodes a command signal CMD and generates internal command signals such as a programming command signal CMD_PRG and a boot-up command signal CMD_BTU. The programming command signal CMD_PRG and the boot-up command signal CMD_BTU are described below.
The control signal generation block 120 generates a programming control signal CTR_PRG corresponding to state information INF_ST in response to the programming command signal CMD_PRG. The state information INF_ST may be provided as a signal having information on a characteristic value of the semiconductor memory device, which is obtained through a test operation, etc. The programming control signal CTR_PRG is a signal for changing a connection state of a fuse included in the fuse array block 130 based on the state information INF_ST.
The fuse array block 130 performs a program operation in response to the programming control signal CTR_PRG. The programming control signal CTR_PRG corresponds to the state information INF_ST as described above. For this reason, the state information INF_ST is programmed in the fuse array block 130. Subsequently, the fuse array block 130 outputs the programmed state information in response to the boot-up command signal CMD_BTU.
The fuse information loading block 140 receives and stores the state information which is programmed in the fuse array block 130, and the stored state information serves a variety of uses during normal operations of the semiconductor memory device.
Hereinafter, a method of controlling a fuse array circuit is described.